This invention relates to an information processing system and more particularly to an information processing system provided with an improved memory system.
Currently, computers sometimes interrupt a program which is executing processing before the completion of that program, and give precedence to the execution of the next program. When returning to the interrupted program later, the required information, such as the address of the command which indicates from which command to re-execute, is stored in a stack memory.
In prior art, when controlling this stack memory, information for the address which indicates the head of the stack memory and the address which indicated the end of the stack memory is provided, and the information in the register during execution by the operational processing unit is stored in the stack memory.
There is a problem in that, when interruption processing occurred during the storage in the stack memory of the information in the register, if the interruption processing is executed by interrupting the storage of the register information in the stack memory, the register information is destroyed.
For this reason, the interruption processing operation is executed after completion of the storage of the register information in the stack memory.
In recent years, with the technological advances in computers, the number of registers has increased, and therefore a long time is required for the storage in the stack memory of all the register information.
Therefore, since interruption processing operations are made to wait for these storage operations, processing in the operational processing unit could not be executed speedily and efficiently.
Thus there is the problem that, particularly in the case of computers with large numbers of registers, when interruption processing is urgently required, this resulted in a reduction of information processing efficiency or processing performance due to operational delays.